1. Field of the Invention
The present invention relates to the field of microprocessors and, more particularly, to a technique for providing internal access through a standardized test access port.
2. Prior Art
The use of testing devices and test methods for performing diagnostics on a product is well known. Simple "bed-of-nails" fixtures to complex emulators have been devised, depending on the purpose and the product being tested. In the area of microprocessors and other complex integrated devices, testing includes the use of software routines to perform operations for validating the product. In some instances, these testing routines are used not only for diagnostics, but for development of further design modifications.
In the testing of microprocessors, diagnostic routines are utilized to determine a response of a processor to certain commands or instructions. Typically, the test routines will compare the actual response (for example, an output signal onto a bus) to a predicted response to determine if an error condition has occurred. If an error has occurred, the testing routine can generate other commands to determine the cause of the fault. Although the concept is simple, in practice there are a variety of ways to test microprocessors and other integrated circuit devices. For example, in testing internal structure of a microprocessor, diagnostic instructions are included in the microcode and these instructions are executed to perform the test.
Since there are numerous techniques available, the electronic industry has standardized approaches to testing electronic devices, including integrated circuits. One standard defines the use of a test access port (TAP) and boundary-scan architecture for digital integrated circuits. This standard was developed by a Joint Test Action Group (JTAG) and has been accepted by The Institute of Electrical and Electronics Engineers (IEEE) and is commonly referred to as IEEE Standard 1149.1 (or JTAG 1149.1). The IEEE 1149.1 Standard is also recognized as an American National Standard (ANSI). The requirements and specifications of this standard are described fully in a publication entitled "IEEE Standard Test Access Port and Boundary-Scan Architecture" as related to IEEE Standard 1149.1. The circuitry defined by this standard allows test instructions and associated test data to be fed into a component and, subsequently, allows the results of execution of such instructions to be read out. The information is communicated in a serial format. The TAP is usually pin-based and used for checking pin functionality and board-level connectivity.
TAP commands can be extended to cover internal circuitry in addition to pins. An extension of this technique would be to connect it to a serial scan chain, as might be used in a fully scanned design, or as in a scanout. Furthermore, the testing standard can be implemented in testing microprocessors. For example, a specifically designated TAP was used in a Pentium.TM. microprocessor manufactured by Intel Corporation in order to allow for IEEE Standard 1149.1 implementation. Although the TAP was available on the Pentium microprocessor, the architecture was never extended to reach control registers in the internal core of the microprocessor "chip." It would be advantageous to use test signals through the TAP to access internal control registers by accessing the control register bus(es), instead of relying solely on the execution of microcode to perform diagnostics. Thus, the TAP access would allow programming flexibility for proprietary (and non-proprietary, if desired) access to the internal microarchitecture of a microprocessor.